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W53300/W53320 16" Voice/Melody/LCD Controller (ViewTalkTM Series)
GENERAL DESCRIPTION
The W53300/W53320 are a high-performance 4-bit microcontroller (C) with built-in speech, melody and 16*48/32*48 LCD driver which includes internal pump circuit. The 4-bit uc core contains dual clock source, 4-bit ALU, two 8-bit timers, one divider, 20 pin input or output, 7 interrupt sources and 8-level subroutine nesting for interrupt applications. Speech unit can be implemented with Winbond 16-sec Power Speech using ADPCM algorithm. Melody unit provides dual tone output and can store up to 1k notes. Power reduction mode is also built in to minimize power dissipation. It is ideal for games, educational toys, remote controllers, watches, clocks and other application products which incorporate both LCD display and melody.
FEATURES
* Operating voltage: 2.4 volt ~ 5.5 volt * Dual clock operating system - RC/Crystal (400 KHz to 4 MHz) for main clock - 32.768 KHz crystal oscillation circuit for sub-oscillator * Memory - Program ROM: 16Kx 20 - Data RAM: 512 x 4 bit (W53320), 704 x 4 bit(W53300) - LCD RAM: 384 x 4 bit (W53320), 192x 4 bit (W53300) * 20 input/output pins - Ports for input only: 2 ports/8 pins - Input/output ports: 2 ports/8 pins - Port for output only: 1 port /4 pins *Power-down mode - Hold function: no operation (except for oscillator) * Seven types of interrupts - Five internal interrupts (Divider ,Timer 0, Timer 1, Speech, Melody) - Two external interrupts (Port RC, Port RD) * One built-in 14-bit clock frequency divider circuit * Two built-in 8-bit programmable countdown timers - Timer 0: one of two internal clock frequencies (FOSC/4 or FOSC/1024) can be selected - Timer 1: built-in auto-reload function includes internal timer, external event counter from RC.0 or TONE output function (can be used as IR carrier output if main clock is 455 kHz) * Built-in 18/14-bit watchdog timer for system reset by mask code option * Powerful instruction sets * 8-level subroutine (including interrupt) nesting
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Publication Release Date: March 1999 Revision A2
W53300/W53320
* LCD driver output - 32 com x 48 seg (W53320), 16 com x 48 seg (W53300) - 1/16 or 1/32 duty, 1/5 or 1/7 bias, internal pump circuit option by special register * Speech function - Provides 384 kbits dedicated speech ROM - Direct driving output for speaker - Maximum 256 sections available * Melody function - Provides 22 kbits dedicated melody ROM - Provides 6 kinds of beat, 16 kinds of tempo, and pitch range from G3# to C7 - Tremolo, triple frequency and 3 kinds of percussion available - Direct driving output for speaker - Maximum 32 scores available * Mix speech with melody available * Multi-engine controller * PWM output current option * Chip On Board available
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W53300/W53320
BLOCK DIAGRAM
SEG0 to SEG47 COM0 to COM31 V2 ~ V6 VDD2 VDD3 DH1, DH2
RAM (896*4)
LCD DRIVER
VLCD PUMP CIRCUIT
VDD TEST
PORT RA ROM (16K*20) ALU PORT RB ACC
RA0~3
RB0~3
PORT RD PC Special Register
IEF HCF HEF EVF PM0 RP0L PEF FLAG1 MR1 LUP2 RP0M MLDH FLAG0 SPCH LUP3 RP0H TONE SPC_busy
RD0~3
PORT RC
RC0~ 3
STACK (8 Levels)
PSR0 LUC
PORT RE
RE0 to 3 LED1 LED2 ROSC PWM1 PWM2
LUP0 LUP1
.
.
.
.
SPC_busy
Speech (384Kbit ROM)
Timer 0 (8 Bit)
Timer 1 (8 Bit)
Interrup & Hold Mode Release
MLD_busy MLD_play
Dual Tone Melody (1K*22 ROM) VSS2 VDDP VSS1 RES
Watch Dog Timer (18/14 Bit)
Divider (14/10 Bit)
Timing Generator
XIN
XOUT
X32I
X32O
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Publication Release Date: March 1999 Revision A2
W53300/W53320
PIN DESCRIPTION
SYMBOL XIN I/O I FUNCTION Input pin for oscillator. It can be connected to crystal, or can connect a resistor to VDD to generate main system clock. Oscillator can be stopped when SCR.1 is set to logic 1. Output pin for oscillator which is connected to another crystal pin. 32.768 KHz crystal input pin. 32.768 KHz crystal output pin. General Input/Output port specified by PM1 register. If output mode is selected, PM0 register can be used to specify CMOS/NMOS driving capability option. Initial state is input mode. General Input/Output port specified by PM2 register. If output mode is selected, PM0 register can be used to specify CMOS/NMOS driving capability option. Initial state is input mode. 4-bit schmitt input with internal pull high option specified by PM0 register. RC0 can be used as clock source for Timer 1. Each pin has an independent interrupt capability specified by PEFL special register. 4-bit schmitt input port with internal pull high option specified by PM0 register. Each pin has an independent interrupt capability specified by PEFH special register. Output port only. RE3 may use as TONE if bit 0 of MR0 special register is set to logic 1. System reset pin with internal pull-high resistor is active low. Test pin. No connect for normal use. Connects resistor to VDD to generate speech or melody clock source. Power source for PWM output. Synchronous LED1 output while speech play/melody is active. Synchronous LED2 output only while speech play is active. Speaker direct driving output 1 while speech or melody is active. Speaker direct driving output 2 while speech or melody is active. LCD segment output pins. LCD common signal output pins. The LCD alternating frequency is fixed at 64Hz. COM16~31 are useless for W53300. Connection terminals for voltage doubler capacitor. Connects a 1uF capacitor to VSS1 to double VDD voltage output if triple pump option is enabled. Otherwise, VDD2 connects to VDD directly if double pump option is enabled. An output if internal pump circuit is enabled. It connects a 1uF capacitor to VSS. Triple VDD voltage will be output if triple pump option is enabled. Otherwise, double VDD voltage will be output if double pump option is enabled. An input if internal pump voltage is disabled.
XOUT X32I X32O RA0 ~ RA3
O I O I/O
RB0 ~ RB3
I/O
RC0 ~ RC3
I
RD0 ~ RD3
I
RE0~RE3/TONE
RES
O I I I I O O O O O O I O
TEST ROSC VDDP LED1 LED2 PWM1 PWM2 SEG0-SEG47 COM0-COM31 DH1, DH2 VDD2
VDD3
O/I
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W53300/W53320
V2 ~ V5
O
V6 VDD VSS1 VSS2
I I I I
LCD COM/SEG output driving voltage. If internal shunt resistor is disabled, external resistors need to be supplied to V2, V3, V4, V5 . A capacitor is suggestted for stable LCD voltage level. External variable resistor connects between VDD3 and V6 to adjust LCD maximun voltage level. Microcontroller Positive power supply (+). Negative power supply (-). Negative power supply (-).
ABSOLUTE MAXIMUM RATINGS
PARAMETER Supply Voltage to Ground Potential Applied Input/Output Voltage Power Dissipation Ambient Operating Temperature Storage Temperature VDD3 Input Voltage RATING -0.3 to +7.0 -0.3 to +7.0 120 0 to +70 -55 to +150 12 UNIT V V mW C C V
Note: Exposure to conditions beyond those listed under Absolute Maximum Ratings may adversely affect the life and reliability of the device.
DC CHARACTERISTICS
(VDD-VSS = 3.0V, FM = 1 MHz, Fs = 32.768 KHz, TA = 25 C, LCD on; unless otherwise specified) PARAMETER SYM. CONDITIONS MIN. TYP. MAX. UNIT Op. Voltage VDD 2.4 5.5 V Op. Current IOP1 Dual clock with crystal 250 300 uA (No Load) Dual clock with RC type 250 300 uA Single Clock 60 100 uA Halt Mode Current Iop2 Dual clock with crystal 120 150 uA (No Load, LCD OFF) Dual clock with RC type 120 150 uA Single clock 6 10 uA Input Low Voltage VIL VSS 0.3*VDD V Input High Voltage VIH 0.7 1 VDD Port RA, RB Output Low VABL IOL = 2.0 mA 0.4 V Voltage Port RA, RB Output High VABH IOH = -2.0 mA 2.4 V Voltage Port RE Sink Current IEL VOL = 0.4V 2 mA Port RE Source Current IEH VOH = 2.4V -2 mA
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Publication Release Date: March 1999 Revision A2
W53300/W53320
PARAMETER Pull-up Resistor RES Pull-up Resistor LED1/LED2 Sink Current PWM1/2 Source Current
SYM. RCD RRES ILED ISPH
PWM1/2 Sink Current
ISPL
LCD Supply Current COM/SEG On Resistor VDD2 output voltage VDD3 output Voltage VDD3 Input Voltage
ILCD Ron VDOB VTRI VLCD
CONDITIONS Port RC, RD VO=1 volt VOL = 2.4V CUR1~0=00 VOL = 2.4V CUR1~0=01 VOL = 2.4V CUR1~0=10 VOL = 2.4V CUR1~0=11 VOL = 0.6V CUR1~0=00 VOL = 0.6V CUR1~0=01 VOL = 0.6V CUR1~0=10 VOL = 0.6V CUR1~0=11 No Load, All Seg. ON IOH = 50 A
VLCDEXT=0 & PMPV3B=0 VLCDEXT=0 & PMPV3B=1 VLCDEXT=0 & PMPV3B=0 VLCDEXT=0 & PMPV3B=1
MIN. 100 20 -30 -60 -90 -120 30 60 90 120 -
TYP. 350 100 8
MAX. 1000 500
UNIT K K mA mA
mA
VLCDEXT=1
50 5K 2 1 3 2 7
10K
A VDD VDD
10
V
AC CHARATERISTICS
(VDD-VSS = 3.0V, FM = 1 MHz, Fs = 32.768 KHz, TA = 25 C, LCD on; unless otherwise specified) PARAMETER SYM. CONDITIONS MIN. TYP. MAX. UNIT Sub-clock Frequency FS Crystal type 32768 Hz Main-clock Frequency FM RC type/Crystal type 400K 4M Hz Op. Frequency FOSC SCR.0=1 32768 Hz SCR.0=0 400K 4M Instruction Cycle Time TCYC One machine cycle 4/FOSC S Reset Active Width TRAW FOSC = 32.768 KHz 1 S Interrupt Active Width TIAW FOSC = 32.768 KHz 1 S Main clock RC frequency FRXIN 400K Hz RXIN =2.4 M 800K RXIN =1.2 M 1M RXIN =910 K 4M RXIN =160 K Frequency Deviation of 10 % f(3V) - f(2.4V) f main-clock FRXIN =1MHz f f(3V) ROSC Frequency FROSC 3.23 MHz ROSC =1.2M Frequency Deviation of 10 % f(3V) - f(2.4V) f FROSC = 3MHz f f(3V) Frame frequency FLCD 64 Hz
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W53300/W53320
TYPICAL APPLICATION CIRCUIT
VCC1
VDD RA0 Output Signal RA3 RB0 RB1 RB2 RB3 RC0 RC1 RC2 RC3 RD0 RD1 RD2 RD3 V6 V5 V4 V3 V2 LED2 LED1 W53320 XIN X32I
32.768 KHz
COM0 COM31 SEG0 SEG47
1 uF
LCD PANEL
(1/7 Bias 1/32 Duty)
32 COM *48 SEG
DH1 DH2 VDD2 VDD3
+
1 uF
+ +
1 uF
VSS VCC2
0.1 uF 0.1 uF 0.1 uF 0.1 uF 0.1 uF
RES
0.1 uF
XOUT VCC1 RXIN
RE0 RE1 RE2 RE3 PWM1 PWM2 buzzer VCC1 or speaker ROSC
X32O VCC2 VDDP
VSS1 VSS2 ROSC
Note: 1.VCC2 supports high current driving capability to PWM1, PWM2, LED1 and LED2. 2.Triple pump, 1/7 bias 3. Two resistors could be added that one is V6~V5, and another V2~VSS for good display.
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Publication Release Date: March 1999 Revision A2
W53300/W53320
VCC1
VDD RA0 Output Signal RA3 RB0 RB1 RB2 RB3 RC0 RC1 RC2 RC3 RD0 RD1 RD2 RD3 V6 V5 V4 V3 V2 LED2 LED1 W53300 XIN X32I
32.768 KHz
COM0 COM15 SEG0 SEG47
1 uF
LCD PANEL
(1/5 Bias 1/16 Duty)
16 COM *48 SEG
DH1 DH2 VDD2 VDD3
+ VCC1
1 uF
VSS VCC2
+
0.1 uF 0.1 uF 0.1 uF 0.1 uF 0.1 uF
RES
0.1 uF
XOUT VCC1 RXIN
RE0 RE1 RE2 RE3 PWM1 PWM2 buzzer VCC1 or speaker ROSC
X32O VCC2 VDDP
VSS1 VSS2 ROSC
Note: 1.VCC2 supports high current driving capability to PWM1, PWM2, LED1 and LED2. 2.Double pump, 1/5 bias 3.Two resistors could be added that one is V5~V6, anther V2~VSS for good display.
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W53300/W53320
Headquarters
No. 4, Creation Rd. III, Science-Based Industrial Park, Hsinchu, Taiwan TEL: 886-3-5770066 FAX: 886-3-5792697 http://www.winbond.com.tw/ Voice & Fax-on-demand: 886-2-7197006
Winbond Electronics (H.K.) Ltd.
Rm. 803, World Trade Square, Tower II, 123 Hoi Bun Rd., Kwun Tong, Kowloon, Hong Kong TEL: 852-27513100 FAX: 852-27552064
Winbond Electronics North America Corp. Winbond Memory Lab. Winbond Microelectronics Corp. Winbond Systems Lab.
2730 Orchard Parkway, San Jose, CA 95134, U.S.A. TEL: 1-408-9436666 FAX: 1-408-9436668
Taipei Office
11F, No. 115, Sec. 3, Min-Sheng East Rd., Taipei, Taiwan TEL: 886-2-7190505 FAX: 886-2-7197502
Note: All data and specifications are subject to change without notice.
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Publication Release Date: March 1999 Revision A2

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